As semiconductor devices become more highly integrated, decreasing the thickness of a gate dielectric is one element that enables a continuing decrease in the scaling of silicon CMOS technology to higher performance levels. Thinner gate dielectrics generate a greater inversion charge, and improve short-channel effects by increasing gate control of the channel because the gate dielectric is formed at the interface where the inversion layer is formed and transistor current is conducted.
Pure SiO2 has been the gate dielectrics of choice since the early days of the integrated circuit. However, as gate dielectrics are being scaled into the sub 20Å thickness range, oxynitrides (SiOxNy) have been increasingly used in high performance CMOS processes. The properties of gate dielectrics are low gate leakage current, high dielectric constant to increase capacitance, high mobility, high reliability and improved diffusion barrier properties.
It is important to continue reducing the thickness of gate dielectrics to increase device performance. However, the reduction of the thickness of gate dielectric increases gate leakage, which limits the scaling of oxynitrides gate dielectrics. Further, the increase in gate leakage is becoming an increasingly larger percentage of the total power dissipation within a integrated circuit. Thus, minimizing gate leakage current for a given oxide capacitance is key to achieving high performance integrated circuits. There are similar considerations for capacitor dielectrics, for which capacitance and leakage are the primary metrics.
Properly optimized oxynitrides have increased dielectric constants and have lower gate leakage currents at a given capacitive thickness as compared to pure SiO2. However, because some plasma nitridation treatments may damage a gate dielectric and generate defects, which are caused by the presence of energetic radicals and ions within the nitridation plasma during the nitridation process, the leakage current within an integrated circuit may be higher than the intrinsic level of leakage current predicted by the thickness and barrier height of the gate dielectric. Thermal nitridation may also introduce defects and trapping levels. Some of the mechanisms that can increase the gate leakage are a trap-assisted tunneling or barrier height reduction as illustrated in FIGS. 1a and 1b. FIGS. 1a and 1b illustrate energy band diagrams of a dielectric barrier layer having a trap or reduced barrier height, respectively. Reducing or eliminating the defects or damage within a gate dielectric could reduce gate leakage and power dissipation.
Therefore, there is a need for a method to form gate and capacitor dielectrics with a low density of traps and near ideal barrier height to reduce gate leakage and power dissipation within integrated circuits.